Peer Reviewed Journal via three different mandatory reviewing processes, since 2006, and, from September 2020, a fourth mandatory peer-editing has been added.
In this paper is presented an investigation on a
new low cost and voltage consumption single
poly-silicon memory cell for passive RFID (Radio
Frequency IDentification)applications. This structure
is low cost due to its single poly-silicon design. This
memory cell has two particularities : the first one is that
no deported capacitor is necessary to program this cell
which allows to reduce the structure size to 1.1μm².
The second one is the way the cell is erased. A Zener
diode is used to generate carriers in order to be injected
into the floating gate. This Zener diode is one of the
key points for the functionality that has to be validated
with some electrical trials. These trials permit to
integrate and use the Zener diodes measured in
simulations of the complete memory cell. This is done
to validate the best candidate between the Zener diodes
used for the cell and highlight the efficiency in
consumption and rapidity to erase the cell. Besides, the
writing and the reading cases are simulated in order to
show the low consumption required by the cell during
these phases.