Peer Reviewed Journal via three different mandatory reviewing processes, since 2006, and, from September 2020, a fourth mandatory peer-editing has been added.
The development of single chip VLSI processors is the key
technology of ever growing pervasive computing to answer
overall demands for usability, mobility, speed, security, etc.
We have so far developed a hardware cryptography-embedded
multimedia mobile processor architecture, HCgorilla. Since
HCgorilla integrates a wide range of techniques from
architectures to applications and languages, one-sided design
approach is not always useful. HCgorilla needs more
complicated strategy, that is, hardware/software (H/S) codesign.
Thus, we exploit the software support of HCgorilla
composed of a Java interface and parallelizing compilers. They
are assumed to be installed in servers in order to reduce the
load and increase the performance of HCgorilla-embedded
clients. Since compilers are the essence of software’s
responsibility, we focus in this article on our recent results
about the design, specifications, and prototyping of
parallelizing compilers for HCgorilla. The parallelizing
compilers are composed of a multicore compiler and a LIW
compiler. They are specified to abstract parallelism from
executable serial codes or the Java interface output and output
the codes executable in parallel by HCgorilla. The prototyping
compilers are written in Java. The evaluation by using an
arithmetic test program shows the reasonability of the
prototyping compilers compared with hand compilers.
